The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
- 1 Port v3 Resource Allocator
- 2 Config & Build System
- 3 Unify text printing functions
- 4 Common payload location
- 5 Fix ALL build warnings
- 6 Post codes
- 7 Use central oprom init
- 8 Use nvramtool for static option table creation
- 9 Local APIC addresses
- 10 printk into buffer
- 11 USB Debug Console
- 12 CBFS
- 13 Tiny Bootblock
- 14 Unify IT8718F and IT8728F / Refactor IT8718F
- 15 Add a config for selecting a SeaBIOS git revision
- 16 Done: Simplify get_option
Port v3 Resource Allocator
The v3 resource allocator should be ported to v4.
Status: Upstream. It's limited to one area for resources, that doesn't overlap with fixed resources.
Config & Build System
The current system of generated Makefiles is non-ideal (for too many reasons for this little margin). Fix it, somehow. Use kconfig to improve the configuration management.
Status: Upstream, boards are converted. Old system is gone. All boards build. HOWEVER, not all boards have been boot-tested yet, please report any issues you encounter!
Developers: Stefan, Ron, Patrick, Uwe, Cristi
Unify text printing functions
There are several copies of print_* and printk_* in the code. Unify them so everything is happier than before (because the disjoint features are merged).
Developers: Patrick, Stefan
Common payload location
Many boards have different names for the payload in targets/.../Config.lb (payload.elf, filo.elf, etherboot.elf, etc) and locations (../payload.elf, or various absolute paths which only work for one developer). The problem will be fixed with kconfig, where the user specifies a payload manually in "make menuconfig".
Fix ALL build warnings
- Someone has to do the deed.
Status: Finished, the build usually issues no warnings. If you see warnings/errors, please report a bug.
Find all outb(x, 0x80) and replace them with post_code(). Use common numbers / defines across the boards.
Status: Finished, except for some local delay routines in early smbus code.
Use central oprom init
- Get rid of all vgabios.c, make all chipsets with own vgabios.c use devices/oprom/x86.c.
- Use the realmode code for vsmsetup too.
Use nvramtool for static option table creation
Instead of maintaining two tools (build_opt_tbl, nvramtool), maintain only one. This mostly requires adding an binary output writer to nvramtool, a cmos.layout parser already exists.
Status: Finished, upstream.
Local APIC addresses
There are several defines in several places that describe the local APIC address:
- LOCAL_APIC_ADDR (even twice)
This should be unified.
printk into buffer
Port the v3 feature that printk can write into a buffer (that might be usable from the client OS, or dumped to output, as soon as output exists).
Consider use cases first (no need to provide buffer support, if all it would be useful for is buffering pre-CAR messages - which can't be buffered).
Developers: ChromiumOS Team
USB Debug Console
Fix USB debug console and make the Kconfig choice actually work. Right now it's possible to transmit single characters but it's not really hooked up.
A filesystem-alike layout for the coreboot image, to enable systems like bayou and to clean up the system in general (eg. no more buildrom).
Upstream, pre-CBFS infrastructure removed.
There are places where using CBFS might be a good idea: Everything that makes use of external files, for example the VSA code in the Geode chipset code. VSA is converted, and tested on a couple of configurations, but untested on others.
Some boards have issues with CBFS because it requires the whole ROM to be accessible at a quite early point in time (compared to the old mechanism). The following table contains validated knowledge if the ROM mapping happens at the right time.
All boards that manage to boot in a tinybootblock configuration are capable at least for the used ROM size (it might be that larger ROMs would fail because they require mapping the larger space)
|Vendor/chipset||ROM enabled||Tiny bootblock||Status / Comments|
|amd/amd8111||Y||Y||Not tested on hardware, yet.|
|amd/cs5530||Y||N||Not tested on hardware, yet.|
|amd/sb600||Y||Y||Build- and runtime-tested on siemens/sitemp_g1p1 by PatrickGeorgi.|
|broadcom/bcm5785||Y||Y||Not tested on hardware, yet.|
|intel/i82371eb||Y||Y||Build- and runtime-tested on ASUS P2B by Uwe Hermann.|
|intel/i82801gx||Y||Y||Build- and runtime-tested on Kontron 986LCD-m by PatrickGeorgi|
|nvidia/ck804||Y||Y||Not tested on hardware, yet.|
|nvidia/mcp55||Y||Y||Not tested on hardware, yet.|
|sis/sis966||Y||Y||Not tested on hardware, yet.|
Developers: Stefan, Ron, Patrick, Myles, Uwe
Right now, the decision whether to use fallback or normal is in cache_as_ram_auto.c in many boards. Make that generic again (also helps with further CBFSification at some point).
Status: Available in Kconfig, works on a couple of boards. Requires per southbridge changes (and northbridge in some cases) on many boards (related to ROM enable, see CBFS section).
Unify IT8718F and IT8728F / Refactor IT8718F
The IT8718F and IT8728F superios are nearly identical. It is unclear if they can use the same code, however, IT8718F requires #include "...ealry_serial.c" in romstage whereas IT8728F does not. IT8728F code also provides better abstraction. If they cannot be merged, at least refactor IT8718F code to more closely match the IT8728F code.
Status: Commited upstream.
Developers: Edward O'Callaghan
Add a config for selecting a SeaBIOS git revision
Currently there is only the choice between coreboot master and the lastest stable revision.
Status: Available in the coreboot build system.
Developers: Antonello Dettori
Done: Simplify get_option
get_option(VALstart, VALlen, default) with a macro that hides start/len in something like