[coreboot-gerrit] New patch to review for coreboot: 79c0732 mainboard/lenovo/g505s/buildOpts.c: Trivial variable rename

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7654

-gerrit

commit 79c073249a42cfa508c9853737cf1f2ff9ce4672
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Sat Dec 6 05:07:33 2014 +1100

    mainboard/lenovo/g505s/buildOpts.c: Trivial variable rename
    
    Minor fix to avoid confusion, nothing to see here.
    
    Change-Id: I89d56a91d2df049e85cf49c23218620caba84880
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/lenovo/g505s/buildOpts.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/lenovo/g505s/buildOpts.c b/src/mainboard/lenovo/g505s/buildOpts.c
index d6328bc..9ed4c74 100644
--- a/src/mainboard/lenovo/g505s/buildOpts.c
+++ b/src/mainboard/lenovo/g505s/buildOpts.c
@@ -385,7 +385,7 @@ GPIO_CONTROL lenovo_g505s_gpio[] = {
 #define SCI_MAP_XHCI_10_0	0x78
 #define SCI_MAP_PWRBTN		0x73
 
-SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
+SCI_MAP_CONTROL lenovo_g505s_sci_map[] = {
 	{GEVENT_PIN( EC_SCI_GEVENT ), EC_SCI_GPE},
 	{GEVENT_PIN( EC_LID_GEVENT ), EC_LID_GPE},
 	{GEVENT_PIN( PCIE_GEVENT ), PCIE_GPE},
@@ -394,7 +394,7 @@ SCI_MAP_CONTROL m6_1035dx_sci_map[] = {
 	{SCI_MAP_XHCI_10_0, PME_GPE},
 	{SCI_MAP_PWRBTN, PME_GPE},
 };
-#define BLDCFG_FCH_SCI_MAP_LIST			(&m6_1035dx_sci_map[0])
+#define BLDCFG_FCH_SCI_MAP_LIST			(&lenovo_g505s_sci_map[0])
 
 // The following definitions specify the default values for various parameters in which there are
 // no clearly defined defaults to be used in the common file.  The values below are based on product