[coreboot-gerrit] New patch to review for coreboot: bb40fe9 ipq806x: Typecast address to void * in read/write operations

Marc Jones (marc.jones@se-eng.com) gerrit at coreboot.org
Wed Oct 29 19:11:31 CET 2014


Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7265

-gerrit

commit bb40fe9b93282371ac5b6d70501a228a3cec5698
Author: Furquan Shaikh <furquan at google.com>
Date:   Fri Apr 11 14:57:11 2014 -0700

    ipq806x: Typecast address to void * in read/write operations
    
    Typecast address to void* to accomodate address being passed as integers
    
    BUG=None
    BRANCH=None
    TEST=Compiled successfully
    
    Original-Change-Id: Iceb51056c8a30a9a9dbd0594f75c23000faa6120
    Original-Reviewed-on: https://chromium-review.googlesource.com/194365
    Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
    Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
    Original-Reviewed-by: David Hendricks <dhendrix at chromium.org>
    (cherry picked from commit abf9b1e77b8a078e6ed873cbf34246bd97c81e98)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I1806e96e194e936975a43e95b9fd7d7458ef1653
---
 src/soc/qualcomm/ipq806x/include/iomap.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h
index 514c6a7..a7066af 100644
--- a/src/soc/qualcomm/ipq806x/include/iomap.h
+++ b/src/soc/qualcomm/ipq806x/include/iomap.h
@@ -37,6 +37,15 @@
 #define _PLATFORM_MSM8960_IOMAP_H_
 
 #include <configs/ipq806x_cdp.h>
+
+/* Typecast to allow integers being passed as address
+   This needs to be included because vendor code is not compliant with our
+   macros for read/write. Hence, special macros for readl_i and writel_i are
+   included to do this in one place for all occurrences in vendor code
+ */
+#define readl_i(a)           read32((const void *)(a))
+#define writel_i(v,a)        write32(v,(void *)a)
+
 #define MSM_CLK_CTL_BASE    0x00900000
 
 #define MSM_TMR_BASE        0x0200A000



More information about the coreboot-gerrit mailing list