[coreboot-gerrit] New patch to review for coreboot: d68cbc3 ipq806x: Add support for GPIO operations
Marc Jones (marc.jones@se-eng.com)
gerrit at coreboot.org
Wed Oct 29 19:11:33 CET 2014
Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7266
-gerrit
commit d68cbc32a3ab007fbc91b65f892f84f0561d0b61
Author: Furquan Shaikh <furquan at google.com>
Date: Thu Apr 10 20:35:05 2014 -0700
ipq806x: Add support for GPIO operations
Basic support for ipq806x GPIO CFG and IO reg operations
Reference: IPQ806x PRM, u-boot arch-ipq806x/gpio.*
BUG=None
BRANCH=None
TEST=Compiled successfully
Original-Change-Id: Ia0a9f288de3ac7bdb1cd4acbf44ba46af4dcc4e2
Original-Reviewed-on: https://chromium-review.googlesource.com/194217
Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
Original-Reviewed-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Commit-Queue: Furquan Shaikh <furquan at chromium.org>
(cherry picked from commit 0b48e6655e63b467fe79d52149be01d23a2a3712)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: I09e222f35b4b20c8eb901f33cf4451085c4c99cc
---
src/soc/qualcomm/ipq806x/Makefile.inc | 3 +
src/soc/qualcomm/ipq806x/gpio.c | 123 +++++++++++++++++++++++++++----
src/soc/qualcomm/ipq806x/include/gpio.h | 44 +++++++++--
src/soc/qualcomm/ipq806x/include/iomap.h | 8 +-
4 files changed, 154 insertions(+), 24 deletions(-)
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 60d7d46..9ac5661 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -1,8 +1,11 @@
bootblock-y += cbfs.c
+bootblock-y += gpio.c
romstage-y += cbfs.c
+romstage-y += gpio.c
ramstage-y += cbfs.c
+ramstage-y += gpio.c
ifeq ($(CONFIG_USE_BLOBS),y)
diff --git a/src/soc/qualcomm/ipq806x/gpio.c b/src/soc/qualcomm/ipq806x/gpio.c
index 6e4140e..ac41e1a 100644
--- a/src/soc/qualcomm/ipq806x/gpio.c
+++ b/src/soc/qualcomm/ipq806x/gpio.c
@@ -28,16 +28,29 @@
* SUCH DAMAGE.
*/
-#include <asm/arch-ipq806x/iomap.h>
-#include <asm/arch-ipq806x/gpio.h>
-#include <asm/io.h>
+#include <iomap.h>
+#include <gpio.h>
+#include <arch/io.h>
+
+/*******************************************************
+Function description: check for invalid GPIO #
+Arguments :
+gpio_t gpio - Gpio number
+
+Return : GPIO Valid(0)/Invalid(1)
+*******************************************************/
+
+static inline int gpio_not_valid(gpio_t gpio)
+{
+ return (gpio > GPIO_MAX_NUM);
+}
+
/*******************************************************
Function description: configure GPIO functinality
Arguments :
-unsigned int gpio - Gpio number
+gpio_t gpio - Gpio number
unsigned int func - Functionality number
-unsigned int dir - direction 0- i/p, 1- o/p
unsigned int pull - pull up/down, no pull range(0-3)
unsigned int drvstr - range (0 - 7)-> (2- 16)MA steps of 2
unsigned int enable - 1 - Disable, 2- Enable.
@@ -46,17 +59,101 @@ Return : None
*******************************************************/
-void gpio_tlmm_config(unsigned int gpio, unsigned int func,
- unsigned int dir, unsigned int pull,
- unsigned int drvstr, unsigned int enable)
+void gpio_tlmm_config_set(gpio_t gpio, unsigned int func,
+ unsigned int pull, unsigned int drvstr,
+ unsigned int enable)
{
unsigned int val = 0;
- val |= pull;
- val |= func << 2;
- val |= drvstr << 6;
- val |= enable << 9;
+
+ if (gpio_not_valid(gpio))
+ return;
+
+ val |= (pull & GPIO_CFG_PULL_MASK) << GPIO_CFG_PULL_SHIFT;
+ val |= (func & GPIO_CFG_FUNC_MASK) << GPIO_CFG_FUNC_SHIFT;
+ val |= (drvstr & GPIO_CFG_DRV_MASK) << GPIO_CFG_DRV_SHIFT;
+ val |= (enable & GPIO_CFG_OE_MASK) << GPIO_CFG_OE_SHIFT;
unsigned int *addr = (unsigned int *)GPIO_CONFIG_ADDR(gpio);
writel(val, addr);
- return;
}
+/*******************************************************
+Function description: Get GPIO configuration
+Arguments :
+gpio_t gpio - Gpio number
+unsigned int *func - Functionality number
+unsigned int *pull - pull up/down, no pull range(0-3)
+unsigned int *drvstr - range (0 - 7)-> (2- 16)MA steps of 2
+unsigned int *enable - 1 - Disable, 2- Enable.
+
+Return : None
+*******************************************************/
+
+
+void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func,
+ unsigned int *pull, unsigned int *drvstr,
+ unsigned int *enable)
+{
+ unsigned int val;
+
+ if (gpio_not_valid(gpio))
+ return;
+
+ unsigned int *addr = (unsigned int *)GPIO_CONFIG_ADDR(gpio);
+ val = readl(addr);
+
+ *pull = (val >> GPIO_CFG_PULL_SHIFT) & GPIO_CFG_PULL_MASK;
+ *func = (val >> GPIO_CFG_FUNC_SHIFT) & GPIO_CFG_FUNC_MASK;
+ *drvstr = (val >> GPIO_CFG_DRV_SHIFT) & GPIO_CFG_DRV_MASK;
+ *enable = (val >> GPIO_CFG_OE_SHIFT) & GPIO_CFG_OE_MASK;
+}
+
+/*******************************************************
+Function description: configure GPIO IO functinality
+Arguments :
+gpio_t gpio - Gpio number
+unsigned int out - Controls value of GPIO output
+
+Return : None
+*******************************************************/
+
+void gpio_io_config_set(gpio_t gpio, unsigned int out)
+{
+ unsigned int val;
+
+ if (gpio_not_valid(gpio))
+ return;
+
+ unsigned int *addr = (unsigned int *)GPIO_CONFIG_ADDR(gpio);
+
+ val = readl(addr);
+ if (out)
+ val |= (1 << GPIO_IO_OUT_SHIFT);
+ else
+ val &= (~(1 << GPIO_IO_OUT_SHIFT));
+
+ writel(val,addr);
+}
+
+/*******************************************************
+Function description: get GPIO IO functinality details
+Arguments :
+gpio_t gpio - Gpio number
+unsigned int *in - Value of GPIO input
+unsigned int *out - Value of GPIO output
+
+Return : None
+*******************************************************/
+
+void gpio_io_config_get(gpio_t gpio, unsigned int *in, unsigned int *out)
+{
+ unsigned int val;
+
+ if (gpio_not_valid(gpio))
+ return;
+
+ unsigned int *addr = (unsigned int *)GPIO_CONFIG_ADDR(gpio);
+
+ val = readl(addr);
+ *in = (val >> GPIO_IO_IN_SHIFT) & GPIO_IO_IN_MASK;
+ *out = (val >> GPIO_IO_OUT_SHIFT) & GPIO_IO_OUT_MASK;
+}
diff --git a/src/soc/qualcomm/ipq806x/include/gpio.h b/src/soc/qualcomm/ipq806x/include/gpio.h
index e2b281e..678da0d 100644
--- a/src/soc/qualcomm/ipq806x/include/gpio.h
+++ b/src/soc/qualcomm/ipq806x/include/gpio.h
@@ -30,8 +30,10 @@
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#ifndef __PLATFORM_AKRONITE_GPIO_H_
-#define __PLATFORM_AKRONITE_GPIO_H_
+#ifndef __SOC_QUALCOMM_IPQ806X_GPIO_H_
+#define __SOC_QUALCOMM_IPQ806X_GPIO_H_
+
+typedef unsigned int gpio_t;
/* GPIO TLMM: Direction */
#define GPIO_INPUT 0
@@ -57,7 +59,37 @@
#define GPIO_ENABLE 0
#define GPIO_DISABLE 1
-void gpio_tlmm_config(unsigned int gpio, unsigned int func,
- unsigned int dir, unsigned int pull,
- unsigned int drvstr, unsigned int enable);
-#endif
+/* GPIO MAX Valid # */
+#define GPIO_MAX_NUM 68
+
+/* GPIO TLMM: Mask */
+#define GPIO_CFG_PULL_MASK 0x3
+#define GPIO_CFG_FUNC_MASK 0xF
+#define GPIO_CFG_DRV_MASK 0x7
+#define GPIO_CFG_OE_MASK 0x1
+
+/* GPIO TLMM: Shift */
+#define GPIO_CFG_PULL_SHIFT 0
+#define GPIO_CFG_FUNC_SHIFT 2
+#define GPIO_CFG_DRV_SHIFT 6
+#define GPIO_CFG_OE_SHIFT 9
+
+/* GPIO IO: Mask */
+#define GPIO_IO_IN_MASK 0x1
+#define GPIO_IO_OUT_MASK 0x1
+
+/* GPIO IO: Shift */
+#define GPIO_IO_IN_SHIFT 0
+#define GPIO_IO_OUT_SHIFT 1
+
+void gpio_tlmm_config_set(gpio_t gpio, unsigned int func,
+ unsigned int pull, unsigned int drvstr,
+ unsigned int enable);
+
+void gpio_tlmm_config_get(gpio_t gpio, unsigned int *func,
+ unsigned int *pull, unsigned int *drvstr,
+ unsigned int *enable);
+
+void gpio_io_config_set(gpio_t gpio, unsigned int out);
+void gpio_io_config_get(gpio_t gpio, unsigned int *in, unsigned int *out);
+#endif // __SOC_QUALCOMM_IPQ806X_GPIO_H_
diff --git a/src/soc/qualcomm/ipq806x/include/iomap.h b/src/soc/qualcomm/ipq806x/include/iomap.h
index a7066af..5fcfde9 100644
--- a/src/soc/qualcomm/ipq806x/include/iomap.h
+++ b/src/soc/qualcomm/ipq806x/include/iomap.h
@@ -33,10 +33,8 @@
* SUCH DAMAGE.
*/
-#ifndef _PLATFORM_MSM8960_IOMAP_H_
-#define _PLATFORM_MSM8960_IOMAP_H_
-
-#include <configs/ipq806x_cdp.h>
+#ifndef __SOC_QUALCOMM_IPQ806X_IOMAP_H_
+#define __SOC_QUALCOMM_IPQ806X_IOMAP_H_
/* Typecast to allow integers being passed as address
This needs to be included because vendor code is not compliant with our
@@ -96,4 +94,4 @@
#define UART2_DM_BASE 0x12490000
#define UART_GSBI2_BASE 0x12480000
-#endif
+#endif // __SOC_QUALCOMM_IPQ806X_IOMAP_H_
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