[coreboot-gerrit] Patch set updated for coreboot: google: veyron: CBFS_SIZE to match the available size for Coreboot in ChromeOS

[Paul Kocialkowski (contact@paulk.fr)]

Paul Kocialkowski (contact at paulk.fr) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11117

-gerrit

commit fa9366124f05060be51e7e85f2a6382732238c0d
Author: Paul Kocialkowski <contact at paulk.fr>
Date:   Wed Sep 16 18:23:23 2015 +0200

    google: veyron: CBFS_SIZE to match the available size for Coreboot in ChromeOS
    
    When building for ChromeOS, it is expected that Coreboot will only occupy the
    first MiB of the SPI flash, according to the veyron fmap description.
    Otherwise, it makes sense to use the full ROM size.
    
    Change-Id: I168386a5011222866654a496d8d054faff7a9406
    Signed-off-by: Paul Kocialkowski <contact at paulk.fr>
---
 src/mainboard/google/veyron/Kconfig | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig
index c474bd6..38a9ef6 100644
--- a/src/mainboard/google/veyron/Kconfig
+++ b/src/mainboard/google/veyron/Kconfig
@@ -85,4 +85,9 @@ config PMIC_BUS
 	int
 	default 0
 
+config CBFS_SIZE
+	hex
+	default 0x100000 if CHROMEOS
+	default ROM_SIZE
+
 endif #  BOARD_GOOGLE_VEYRON