[coreboot-gerrit] Patch set updated for coreboot: arch: armv7: Adding armv7-r configuration
hakim giydan (hgiydan@marvell.com)
gerrit at coreboot.org
Thu Aug 4 01:12:57 CEST 2016
hakim giydan (hgiydan at marvell.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15335
-gerrit
commit 58747f61e501135d6fe9366a8adcf6997f4797b5
Author: Hakim Giydan <hgiydan at marvell.com>
Date: Wed Aug 3 16:09:23 2016 -0700
arch: armv7: Adding armv7-r configuration
This change adds armv7-r support for all stages.
armv7-r is an ARM processor based on the Cortex-R series.
Currently, there is support for armv7-a and armv7-m and
armv7-a files has been modfied to accommodate armv7-r by
adding ENV_ARMV7_A, ENV_ARMV7_R and ENV_ARMV7_M constants
to src/include/rules.h.
armv7-r exceptions support will added in a later time.
Change-Id: If94415d07fd6bd96c43d087374f609a2211f1885
Signed-off-by: Hakim Giydan <hgiydan at marvell.com>
---
src/arch/arm/armv7/Kconfig | 16 +++++++++++
src/arch/arm/armv7/Makefile.inc | 59 +++++++++++++++++++++++++++++++++++++--
src/arch/arm/armv7/cpu.S | 12 ++++++++
src/arch/arm/armv7/exception_m.c | 36 ------------------------
src/arch/arm/armv7/exception_mr.c | 36 ++++++++++++++++++++++++
src/include/rules.h | 13 +++++++++
util/xcompile/xcompile | 2 +-
7 files changed, 134 insertions(+), 40 deletions(-)
diff --git a/src/arch/arm/armv7/Kconfig b/src/arch/arm/armv7/Kconfig
index 0ab3542..3734426 100644
--- a/src/arch/arm/armv7/Kconfig
+++ b/src/arch/arm/armv7/Kconfig
@@ -19,3 +19,19 @@ config ARCH_BOOTBLOCK_ARMV7_M
config ARCH_VERSTAGE_ARMV7_M
def_bool n
select ARCH_VERSTAGE_ARM
+
+config ARCH_BOOTBLOCK_ARMV7_R
+ def_bool n
+ select ARCH_BOOTBLOCK_ARM
+
+config ARCH_VERSTAGE_ARMV7_R
+ def_bool n
+ select ARCH_VERSTAGE_ARM
+
+config ARCH_ROMSTAGE_ARMV7_R
+ def_bool n
+ select ARCH_ROMSTAGE_ARM
+
+config ARCH_RAMSTAGE_ARMV7_R
+ def_bool n
+ select ARCH_RAMSTAGE_ARM
diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc
index 2e9c49c..d978f00 100644
--- a/src/arch/arm/armv7/Makefile.inc
+++ b/src/arch/arm/armv7/Makefile.inc
@@ -16,10 +16,12 @@
###############################################################################
armv7_flags = -mthumb -I$(src)/arch/arm/include/armv7/ -D__COREBOOT_ARM_ARCH__=7
-armv7-a_flags = -march=armv7-a $(armv7_flags)
-armv7-m_flags = -march=armv7-m $(armv7_flags)
+armv7-a_flags = -march=armv7-a $(armv7_flags) -D__COREBOOT_ARM_V7_A__
+armv7-m_flags = -march=armv7-m $(armv7_flags) -D__COREBOOT_ARM_V7_M__
+armv7-r_flags = -march=armv7-r $(armv7_flags) -D__COREBOOT_ARM_V7_R__
armv7_asm_flags = -Wa,-mthumb -Wa,-mimplicit-it=always -Wa,-mno-warn-deprecated
+armv7-r_asm_flags = $(armv7-r_flags) $(armv7_asm_flags)
###############################################################################
# bootblock
@@ -46,9 +48,22 @@ bootblock-S-ccopts += $(armv7_asm_flags)
ifneq ($(CONFIG_BOOTBLOCK_CUSTOM),y)
bootblock-y += bootblock_m.S
endif
-bootblock-y += exception_m.c
+bootblock-y += exception_mr.c
bootblock-y += cache_m.c
+else ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7_R),y)
+bootblock-generic-ccopts += $(armv7-r_flags)
+bootblock-S-ccopts += $(armv7-r_asm_flags)
+
+ifneq ($(CONFIG_BOOTBLOCK_CUSTOM),y)
+bootblock-y += bootblock.S
+endif
+
+bootblock-y += cache.c
+bootblock-y += cpu.S
+bootblock-y += exception_mr.c
+bootblock-y += mmu.c
+
endif # CONFIG_ARCH_BOOTBLOCK_ARMV7
################################################################################
@@ -73,6 +88,17 @@ libverstage-S-ccopts += $(armv7_asm_flags)
verstage-generic-ccopts += $(armv7-m_flags)
verstage-S-ccopts += $(armv7_asm_flags)
+else ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7_R),y)
+libverstage-generic-ccopts += $(armv7-r_flags)
+libverstage-S-ccopts += $(armv7-r_asm_flags)
+verstage-generic-ccopts += $(armv7-r_flags)
+verstage-S-ccopts += $(armv7-r_asm_flags)
+
+verstage-y += cache.c
+verstage-y += cpu.S
+verstage-y += exception_mr.c
+verstage-y += mmu.c
+
endif # CONFIG_ARCH_VERSTAGE_ARMV7_M
################################################################################
@@ -91,6 +117,18 @@ romstage-S-ccopts += $(armv7_asm_flags)
rmodules_arm-generic-ccopts += $(armv7-a_flags)
rmodules_arm-S-ccopts += $(armv7_asm_flags)
+else ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7_R),y)
+romstage-y += cache.c
+romstage-y += cpu.S
+romstage-y += exception_mr.c
+romstage-y += mmu.c
+
+romstage-generic-ccopts += $(armv7-r_flags)
+romstage-S-ccopts += $(armv7-r_asm_flags)
+
+rmodules_arm-generic-ccopts += $(armv7-r_flags)
+rmodules_arm-S-ccopts += $(armv7-r_asm_flags)
+
endif # CONFIG_ARCH_ROMSTAGE_ARMV7
###############################################################################
@@ -111,4 +149,19 @@ ramstage-S-ccopts += $(armv7_asm_flags)
# All rmodule code is armv7 if ramstage is armv7.
rmodules_arm-generic-ccopts += $(armv7-a_flags)
rmodules_arm-S-ccopts += $(armv7_asm_flags)
+
+else ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7_R),y)
+
+ramstage-y += cache.c
+ramstage-y += cpu.S
+ramstage-y += exception_mr.c
+ramstage-y += mmu.c
+
+ramstage-generic-ccopts += $(armv7-r_flags)
+ramstage-S-ccopts += $(armv7-r_asm_flags)
+
+# All rmodule code is armv7 if ramstage is armv7.
+rmodules_arm-generic-ccopts += $(armv7-r_flags)
+rmodules_arm-S-ccopts += $(armv7-r_asm_flags)
+
endif # CONFIG_ARCH_RAMSTAGE_ARMV7
diff --git a/src/arch/arm/armv7/cpu.S b/src/arch/arm/armv7/cpu.S
index 6c00f62..21a16d2 100644
--- a/src/arch/arm/armv7/cpu.S
+++ b/src/arch/arm/armv7/cpu.S
@@ -31,6 +31,7 @@
*/
#include <arch/asm.h>
+#include <rules.h>
/*
* Dcache invalidations by set/way work by passing a [way:sbz:set:sbz:level:0]
@@ -126,6 +127,7 @@ ENTRY(arm_init_caches)
/* Flush and invalidate dcache in ascending order */
bl dcache_invalidate_all
+#if ENV_ARMV7_A
/* Deactivate MMU (0), Alignment Check (1) and DCache (2) */
and r4, # ~(1 << 0) & ~(1 << 1) & ~(1 << 2)
mcr p15, 0, r4, c1, c0, 0
@@ -133,6 +135,16 @@ ENTRY(arm_init_caches)
/* Invalidate icache and TLB for good measure */
mcr p15, 0, r0, c7, c5, 0
mcr p15, 0, r0, c8, c7, 0
+#endif
+
+#if ENV_ARMV7_R
+ /* Deactivate Alignment Check (1) and DCache (2) */
+ and r4, # ~(1 << 1) & ~(1 << 2)
+ mcr p15, 0, r4, c1, c0, 0
+
+ /* Invalidate icache for good measure */
+ mcr p15, 0, r0, c7, c5, 0
+#endif
dsb
isb
diff --git a/src/arch/arm/armv7/exception_m.c b/src/arch/arm/armv7/exception_m.c
deleted file mode 100644
index d76cc6a..0000000
--- a/src/arch/arm/armv7/exception_m.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * This file is part of the libpayload project.
- *
- * Copyright 2013 Google Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. The name of the author may not be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <arch/exception.h>
-#include <console/console.h>
-
-void exception_init(void)
-{
- printk(BIOS_DEBUG, "Exception handlers not installed.\n");
-}
diff --git a/src/arch/arm/armv7/exception_mr.c b/src/arch/arm/armv7/exception_mr.c
new file mode 100644
index 0000000..d76cc6a
--- /dev/null
+++ b/src/arch/arm/armv7/exception_mr.c
@@ -0,0 +1,36 @@
+/*
+ * This file is part of the libpayload project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <arch/exception.h>
+#include <console/console.h>
+
+void exception_init(void)
+{
+ printk(BIOS_DEBUG, "Exception handlers not installed.\n");
+}
diff --git a/src/include/rules.h b/src/include/rules.h
index 89fdd21..a632804 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -131,6 +131,19 @@
#elif __COREBOOT_ARM_ARCH__ == 7
#define ENV_ARMV4 0
#define ENV_ARMV7 1
+#if defined(__COREBOOT_ARM_V7_A__)
+#define ENV_ARMV7_A 1
+#define ENV_ARMV7_M 0
+#define ENV_ARMV7_R 0
+#elif defined(__COREBOOT_ARM_V7_M__)
+#define ENV_ARMV7_A 0
+#define ENV_ARMV7_M 1
+#define ENV_ARMV7_R 0
+#elif defined(__COREBOOT_ARM_V7_R__)
+#define ENV_ARMV7_A 0
+#define ENV_ARMV7_M 0
+#define ENV_ARMV7_R 1
+#endif
#else
#define ENV_ARMV4 0
#define ENV_ARMV7 0
diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile
index 13a0e8f..1a9c38c 100755
--- a/util/xcompile/xcompile
+++ b/util/xcompile/xcompile
@@ -316,7 +316,7 @@ arch_config_arm() {
TBFDARCHS="littlearm"
TCLIST="armv7-a armv7a arm"
TWIDTH="32"
- TSUPP="arm armv4 armv7 armv7_m"
+ TSUPP="arm armv4 armv7 armv7_m armv7_r"
TABI="eabi"
}
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