[coreboot-gerrit] New patch to review for coreboot: mainboard/intel/amenia: Configure PERST_0 for PCIe

[Vaibhav Shankar (vaibhav.shankar@intel.com)]

Vaibhav Shankar (vaibhav.shankar at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16350

-gerrit

commit 8c87a95d2d05769bfcda3bbce1c480c3e412430f
Author: Vaibhav Shankar <vaibhav.shankar at intel.com>
Date:   Fri Aug 26 19:10:21 2016 -0700

    mainboard/intel/amenia: Configure PERST_0 for PCIe
    
    Added a variable to store the address of GPIO_122.
    Program GPIO_122 for PERST_0 assertion during S0ix.
    
    BUG=chrome-os-partner:55877
    
    Change-Id: I39b4d8bba92f352ae121c7552f58480295b48aef
    Signed-off-by: Vaibhav Shankar <vaibhav.shankar at intel.com>
---
 src/mainboard/intel/amenia/acpi/mainboard.asl | 11 +++++++++++
 src/mainboard/intel/amenia/gpio.h             |  2 +-
 2 files changed, 12 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/intel/amenia/acpi/mainboard.asl b/src/mainboard/intel/amenia/acpi/mainboard.asl
index 80f8f26..293580b 100644
--- a/src/mainboard/intel/amenia/acpi/mainboard.asl
+++ b/src/mainboard/intel/amenia/acpi/mainboard.asl
@@ -17,8 +17,19 @@
 #include <on_board.h>
 #include "../ec.h"
 
+/* GPIO for PERST */
+#define PERST_0			GPIO_122
+
+#define GPIO_SW			GPIO_SOUTHWEST
+#define GPIO_NW			GPIO_NORTHWEST
+#define GPIO_N			GPIO_NORTH
+#define GPIO_W			GPIO_WEST
+
 Scope (\_SB)
 {
+	/* PRAD -  Pass the address of PERST_0 to pcie.asl */
+	Name (PRAD, PAD_IOSF_MMIO(NW, PERST_0))
+
 	Device (LID0)
 	{
 		Name (_HID, EisaId ("PNP0C0D"))
diff --git a/src/mainboard/intel/amenia/gpio.h b/src/mainboard/intel/amenia/gpio.h
index 4a4d08f..3eb4103 100644
--- a/src/mainboard/intel/amenia/gpio.h
+++ b/src/mainboard/intel/amenia/gpio.h
@@ -223,7 +223,7 @@ static const struct pad_config gpio_table[] = {
 	PAD_NC(GPIO_119, DN_20K), /* GP_SSP_2_FS0 */
 	PAD_NC(GPIO_120, DN_20K), /* GP_SSP_2_FS1 */
 	PAD_NC(GPIO_121, DN_20K), /* GP_SSP_2_FS2 */
-	PAD_NC(GPIO_122, DN_20K), /* GP_SSP_2_RXD */
+	PAD_CFG_GPO(GPIO_122, 0, DEEP), /* WIFI PERST_0 */
 	PAD_NC(GPIO_123, DN_20K), /* GP_SSP_2_TXD */
 	/** end of North West Community */
 	/** North Community */