[coreboot-gerrit] Patch set updated for coreboot: soc/apollolake/cache_as_ram: Fix initial stack pointer calculation
Alexandru Gagniuc (mr.nuke.me@gmail.com)
gerrit at coreboot.org
Mon Jan 25 06:40:45 CET 2016
Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13314
-gerrit
commit 8174402e0ddc70d9ec155960edaf084097dd53a5
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date: Thu Oct 22 09:28:13 2015 -0700
soc/apollolake/cache_as_ram: Fix initial stack pointer calculation
We want the initial stack pointer to point within the region allocated
for stack, and not above it. This means we need to place it four
bytes below the end address, so the first push does not write above
the allocated stack region.
Change-Id: I288b3c0f04b9e3be742012124ecac7825874cb7f
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
src/soc/intel/apollolake/bootblock/cache_as_ram.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/intel/apollolake/bootblock/cache_as_ram.S b/src/soc/intel/apollolake/bootblock/cache_as_ram.S
index 6ecfa86..e496087 100644
--- a/src/soc/intel/apollolake/bootblock/cache_as_ram.S
+++ b/src/soc/intel/apollolake/bootblock/cache_as_ram.S
@@ -124,7 +124,7 @@ car_init_done:
/* Setup bootblock stack */
mov esp, CONFIG_DCACHE_RAM_BASE
- add esp, CONFIG_DCACHE_RAM_BOOTBLOCK_STACK_SIZE
+ add esp, CONFIG_DCACHE_RAM_BOOTBLOCK_STACK_SIZE - 4
/* Make sure CAR region is executable */
mov ecx, 0x120
More information about the coreboot-gerrit
mailing list