[coreboot-gerrit] New patch to review for coreboot: mainboard/intel/galileo: Add FSP binary support
Leroy P Leahy (leroy.p.leahy@intel.com)
gerrit at coreboot.org
Fri Jan 29 03:22:16 CET 2016
Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13508
-gerrit
commit 6e8dfb1e87fbb60e466305008ba37400611d6927
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Tue Jan 26 15:10:53 2016 -0800
mainboard/intel/galileo: Add FSP binary support
Add the FSP binary to the flash image:
* Specify the FSP binary image ID
* Specify the default FSP binary file location
* Specify where in the flash image the FSP image must reside
* Specify where in the ESRAM the FSP image must reside
* Note that the FSP binary image does not get relocated!
Testing requires selecting HAVE_FSP_RAW_BIN and an FSP.bin file in the
location specified by CONFIG_FSP_FILE.
TEST=Build and run on Galileo
Change-Id: I4d28b8e55d775a0906b6f535a8b9673f1b56fa30
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
src/mainboard/intel/galileo/Kconfig | 63 ++++++++++++++++++++++++++++++++
src/mainboard/intel/galileo/Makefile.inc | 15 ++++++++
2 files changed, 78 insertions(+)
diff --git a/src/mainboard/intel/galileo/Kconfig b/src/mainboard/intel/galileo/Kconfig
index cae136f..dd2d1bb 100755
--- a/src/mainboard/intel/galileo/Kconfig
+++ b/src/mainboard/intel/galileo/Kconfig
@@ -21,6 +21,69 @@ config BOARD_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP1_1
select SOC_INTEL_QUARK
+if PLATFORM_USES_FSP1_1
+
+config FSP_IMAGE_ID_STRING
+ string "8 byte platform string identifying the FSP platform"
+ default "QUK-FSP0"
+ help
+ 8 ASCII character byte signature string that will help match the FSP
+ binary to a supported hardware configuration.
+
+config FSP_FILE
+ string
+ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/fsp.bin"
+ help
+ The path and filename of the Intel FSP binary for this platform.
+
+config FSP_LOC
+ hex
+ default 0xfff80000
+ help
+ The location in CBFS that the FSP is located. This must match the
+ value that is set in the FSP binary. If the FSP needs to be moved,
+ rebase the FSP with Intel's BCT (tool).
+
+config FSP_PDAT_FILE
+ string
+ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/pdat.bin"
+ depends on PLATFORM_USES_FSP1_1
+ help
+ The path and filename of the Intel Galileo PDAT binary. This binary
+ is dumpped from Galileo BIOS.
+
+config FSP_PDAT_LOC
+ hex
+ default 0xfff10000
+ depends on PLATFORM_USES_FSP1_1
+ help
+ The location in CBFS that the PDAT is located. It must match the
+ PCD PcdPlatformDataBaseAddress of Quark SoC FSP.
+
+config FSP_SRAM_LOC
+ hex
+ default 0x80000000
+ help
+ The location in SRAM where a copy of the FSP binary is placed.
+
+config HAVE_FSP_PDAT_FILE
+ bool
+ default n
+ help
+ The PDAT file is required for the FSP 1.1 binary
+
+config HAVE_FSP_RAW_BIN
+ bool "Should the Intel FSP binary be added to the flash image"
+ default n
+ help
+ Select this option to add an Intel FSP binary to
+ the resulting coreboot image.
+
+ Note: Without this binary, coreboot builds relying on the FSP
+ will not boot
+
+endif # PLATFORM_USES_FSP1_1
+
config MAINBOARD_DIR
string
default intel/galileo
diff --git a/src/mainboard/intel/galileo/Makefile.inc b/src/mainboard/intel/galileo/Makefile.inc
index 3ffba1c..2c4be88 100755
--- a/src/mainboard/intel/galileo/Makefile.inc
+++ b/src/mainboard/intel/galileo/Makefile.inc
@@ -14,3 +14,18 @@
##
CPPFLAGS_common += -I$(src)/vendorcode/intel/fsp/fsp1_1/quark
+
+# Add the FSP binary to the cbfs image
+ifeq ($(CONFIG_HAVE_FSP_RAW_BIN),y)
+cbfs-files-y += fsp.bin
+fsp.bin-file := $(call strip_quotes,$(CONFIG_FSP_FILE))
+fsp.bin-position := $(CONFIG_FSP_LOC)
+fsp.bin-type := raw
+endif # CONFIG_HAVE_FSP_RAW_BIN
+
+ifeq ($(CONFIG_HAVE_FSP_PDAT_FILE),y)
+cbfs-files-y += pdat.bin
+pdat.bin-file := $(call strip_quotes,$(CONFIG_FSP_PDAT_FILE))
+pdat.bin-position := $(CONFIG_FSP_PDAT_LOC)
+pdat.bin-type := raw
+endif # CONFIG_HAVE_FSP_PDAT_FILE
More information about the coreboot-gerrit
mailing list