[coreboot-gerrit] New patch to review for coreboot: intel/amenia: LID wake
Shaunak Saha (shaunak.saha@intel.com)
gerrit at coreboot.org
Tue Jul 12 08:27:01 CEST 2016
Shaunak Saha (shaunak.saha at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15618
-gerrit
commit 984ce5296c1d86d1fbaf8c5b9389d4c49dc4a34f
Author: Shaunak Saha <shaunak.saha at intel.com>
Date: Mon Jul 11 23:21:33 2016 -0700
intel/amenia: LID wake
This patch ads the support to wake up from S3 on lidopen.
mainboard.asl have the _PRW defined for the wakeup support
in S3.
BUG = chrome-os-partner:53992
TEST = Platform wakes from S3 on lidopen
Change-Id: I48b456baf5f7e1c2f28454fa66bb90ad761bb103
Signed-off-by: Shaunak Saha <shaunak.saha at intel.com>
---
src/mainboard/intel/amenia/acpi/mainboard.asl | 1 +
src/mainboard/intel/amenia/ec.h | 3 +++
src/mainboard/intel/amenia/gpio.h | 2 +-
3 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/intel/amenia/acpi/mainboard.asl b/src/mainboard/intel/amenia/acpi/mainboard.asl
index a679471..7ccbcfb 100644
--- a/src/mainboard/intel/amenia/acpi/mainboard.asl
+++ b/src/mainboard/intel/amenia/acpi/mainboard.asl
@@ -25,6 +25,7 @@ Scope (\_SB)
{
Return (\_SB.PCI0.LPCB.EC0.LIDS)
}
+ Name (_PRW, Package () { GPE_EC_WAKE, 0x3 })
}
Device (PWRB)
diff --git a/src/mainboard/intel/amenia/ec.h b/src/mainboard/intel/amenia/ec.h
index ba3962a..a2229d2 100644
--- a/src/mainboard/intel/amenia/ec.h
+++ b/src/mainboard/intel/amenia/ec.h
@@ -26,6 +26,9 @@
*/
#define EC_SCI_GPI GPE0_DW1_11
+/* GPIO_11 is the EC_SOC_WAKE and is used to wake up from S3 on LID open */
+#define GPE_EC_WAKE GPE0_DW1_22
+
#define MAINBOARD_EC_SCI_EVENTS \
(EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\
EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\
diff --git a/src/mainboard/intel/amenia/gpio.h b/src/mainboard/intel/amenia/gpio.h
index a39cca3..1a693ba 100644
--- a/src/mainboard/intel/amenia/gpio.h
+++ b/src/mainboard/intel/amenia/gpio.h
@@ -255,7 +255,7 @@ static const struct pad_config gpio_table[] = {
/* NFC INT */
PAD_CFG_GPI_APIC(GPIO_21, UP_20K, DEEP, LEVEL, NONE),
/* TCH_INT_N */
- PAD_CFG_GPI_APIC(GPIO_22, UP_20K, DEEP, LEVEL, NONE),
+ PAD_CFG_GPI_SCI(GPIO_22, UP_20K, DEEP, EDGE_SINGLE, INVERT),
/* EC_SOC_WAKE_1P8_N */
PAD_CFG_GPO(GPIO_23, 1, DEEP), /* GPS_NSTANDBY */
PAD_CFG_GPO(GPIO_24, 1, DEEP), /* SSD_SATA_DEVSLP */
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