[coreboot-gerrit] New patch to review for coreboot: arch/riscv: copy read/write8/16/32 from x86

Jonathan Neuschäfer (j.neuschaefer@gmx.net) gerrit at coreboot.org
Fri Jun 10 20:37:59 CEST 2016


Jonathan Neuschäfer (j.neuschaefer at gmx.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15146

-gerrit

commit 764149cab00699feec53edeb0966d1112f8770e0
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date:   Fri Jun 10 19:35:15 2016 +0200

    arch/riscv: copy read/write8/16/32 from x86
    
    Change-Id: I12de8f82499074f0fbbc1c09210b00c6a9614c1b
    Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
 src/arch/riscv/include/arch/io.h | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/src/arch/riscv/include/arch/io.h b/src/arch/riscv/include/arch/io.h
index 804d7dc..a930587 100644
--- a/src/arch/riscv/include/arch/io.h
+++ b/src/arch/riscv/include/arch/io.h
@@ -45,4 +45,35 @@ static inline uint32_t inl(uint16_t port)
 	return 0;
 }
 
+static inline __attribute__((always_inline)) uint8_t read8(const volatile void *addr)
+{
+	return *((volatile uint8_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) uint16_t read16(const volatile void *addr)
+{
+	return *((volatile uint16_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) uint32_t read32(const volatile void *addr)
+{
+	return *((volatile uint32_t *)(addr));
+}
+
+static inline __attribute__((always_inline)) void write8(volatile void *addr, uint8_t value)
+{
+	*((volatile uint8_t *)(addr)) = value;
+}
+
+static inline __attribute__((always_inline)) void write16(volatile void *addr, uint16_t value)
+{
+	*((volatile uint16_t *)(addr)) = value;
+}
+
+static inline __attribute__((always_inline)) void write32(volatile void *addr, uint32_t value)
+{
+	*((volatile uint32_t *)(addr)) = value;
+}
+
+
 #endif



More information about the coreboot-gerrit mailing list