[coreboot-gerrit] New patch to review for coreboot: arch/riscv: Compile with -mcmodel=medany

Jonathan Neuschäfer (j.neuschaefer@gmx.net) gerrit at coreboot.org
Fri Jun 10 20:38:07 CEST 2016


Jonathan Neuschäfer (j.neuschaefer at gmx.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15148

-gerrit

commit 69d62976ab4b6b3062843e892cef07154059d403
Author: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
Date:   Fri Jun 10 19:35:15 2016 +0200

    arch/riscv: Compile with -mcmodel=medany
    
    In the default (medlow) code model, pointers are loaded with a lui, addi
    instruction sequence:
    
    	lui	a0, 0xNNNNN
    	addi	a0, a0, 0xNNN
    
    Since lui sign-extends bits 32-63 from bit 31 on RV64, lui/addi can't
    load pointers just above 0x80000000, where RISC-V's RAM now lives.
    
    The medany code model gets around this restriction by loading pointers
    trough auipc and addi:
    
    	auipc	a0, 0xNNNNN
    	addi	a0, a0, 0xNNN
    
    This way, any pointer within the current pc ±2G can be loaded, which is
    by far sufficient for coreboot.
    
    Change-Id: I77350d9218a687284c1337d987765553cf915a22
    Signed-off-by: Jonathan Neuschäfer <j.neuschaefer at gmx.net>
---
 src/arch/riscv/Makefile.inc | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc
index 4521dcb..243fa53 100644
--- a/src/arch/riscv/Makefile.inc
+++ b/src/arch/riscv/Makefile.inc
@@ -15,7 +15,7 @@
 ##
 ################################################################################
 
-riscv_flags = -I$(src)/arch/riscv/
+riscv_flags = -I$(src)/arch/riscv/ -mcmodel=medany
 
 riscv_asm_flags =
 
@@ -48,6 +48,9 @@ $(objcbfs)/bootblock.debug: $$(bootblock-objs)
 		-T $(call src-to-obj,bootblock,src/mainboard/$(MAINBOARDDIR)/memlayout.ld) --whole-archive --start-group $(filter-out %.ld,$(bootblock-objs)) \
 		$(LIBGCC_FILE_NAME_bootblock) --end-group $(COMPILER_RT_bootblock)
 
+bootblock-c-ccopts += $(riscv_flags)
+bootblock-S-ccopts += $(riscv_asm_flags)
+
 endif
 
 ################################################################################



More information about the coreboot-gerrit mailing list