[coreboot-gerrit] Patch set updated for coreboot: include/device/dram/ddr3: Add additional frequencies

Patrick Rudolph (siro@das-labor.org) gerrit at coreboot.org
Thu Jun 16 17:53:02 CEST 2016


Patrick Rudolph (siro at das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15182

-gerrit

commit c0e7d982991f350e5a6961eca3b89c16d18f66c1
Author: Patrick Rudolph <siro at das-labor.org>
Date:   Tue Jun 14 18:48:17 2016 +0200

    include/device/dram/ddr3: Add additional frequencies
    
    IvyBridge memory controller supports more frequencies than SandyBridge.
    Required for future patches.
    
    Change-Id: I0bcb670c20407ec0aec20bae85c4cbe6ccc44b16
    Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
 src/include/device/dram/ddr3.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h
index d58cdce..eae7840 100644
--- a/src/include/device/dram/ddr3.h
+++ b/src/include/device/dram/ddr3.h
@@ -35,9 +35,13 @@
  */
 #define TCK_1333MHZ     192
 #define TCK_1200MHZ     212
+#define TCK_1100MHZ     232
 #define TCK_1066MHZ     240
+#define TCK_1000MHZ     256
 #define TCK_933MHZ      274
+#define TCK_900MHZ      284
 #define TCK_800MHZ      320
+#define TCK_700MHZ      365
 #define TCK_666MHZ      384
 #define TCK_533MHZ      480
 #define TCK_400MHZ      640



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