[coreboot-gerrit] New patch to review for coreboot: nb/intel/sandybridge/raminit: Use supported CAS

Patrick Rudolph (siro@das-labor.org) gerrit at coreboot.org
Thu Jun 16 17:53:06 CEST 2016


Patrick Rudolph (siro at das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15217

-gerrit

commit b08cb8bdc6ffbed2cc24ef1350b4e0b2d5ce326c
Author: Patrick Rudolph <siro at das-labor.org>
Date:   Wed Jun 15 20:28:32 2016 +0200

    nb/intel/sandybridge/raminit: Use supported CAS
    
    Instead of programming unsupported CAS use the highest supported
    value.
    Increase error message verbosity level.
    
    Useful for overclocking.
    
    Tested on Lenovo T520 and DDR3-1600 DIMM (RMT3170eb86e9w16).
    Allows to run a DDR3-1600 DIMM at 933Mhz.
    
    Change-Id: I2e8aadd541f06fa032ad7095c9a2d5e3bb7613f3
    Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
 src/northbridge/intel/sandybridge/raminit.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index ba03bbb..aad10f9 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -722,8 +722,16 @@ static void dram_timing(ramctr_timing * ctrl)
 		val++;
 	}
 	/* Is CAS supported */
-	if (!(ctrl->cas_supported & (1 << (val - 4))))
-		printk(BIOS_DEBUG, "CAS not supported\n");
+	if (!(ctrl->cas_supported & (1 << (val - 4)))) {
+		printk(BIOS_ERR, "CAS %uT not supported. ", val);
+		val = 15;
+		/* Find highest supported CAS latency */
+		while (!((ctrl->cas_supported >> (val - 4)) & 1))
+			val--;
+
+		printk(BIOS_ERR, "Using CAS %uT instead.\n", val);
+	}
+
 	printk(BIOS_DEBUG, "Selected CAS latency   : %uT\n", val);
 	ctrl->CAS = val;
 	ctrl->CWL = get_CWL(ctrl->CAS);



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