[coreboot-gerrit] New patch to review for coreboot: rk3399: add definition for SP0 iomux

[Martin Roth (martinroth@google.com)]

Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15295

-gerrit

commit 682799f9877400ea788fb6b06e31a42cd6a9fd60
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Wed Apr 6 13:44:37 2016 -0700

    rk3399: add definition for SP0 iomux
    
    This register is described in the TRM in section called
    GRF_GPIO3D_IOMUX. Added definitions allow to configure the SPI0
    interface.
    
    BRANCH=none
    BUG=chrome-os-partner:50645, chrome-os-partner:51537
    TEST=with the rest of the patches applied it is possible to
         communicate over SPI0
    
    Change-Id: Ieee3fcae6095020042b02673c7d863f398ed2eb4
    Signed-off-by: Martin Roth <martinroth at chromium.org>
    Original-Commit-Id: 8f155e3b47c9f44ad4e5a2513916572e7d5ec0ab
    Original-Change-Id: Iea92971b0520dc4549cd0fd263dcb2098f80f6d6
    Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/349851
    Original-Reviewed-by: Douglas Anderson <dianders at chromium.org>
---
 src/soc/rockchip/rk3399/include/soc/grf.h | 11 ++++++++---
 1 file changed, 8 insertions(+), 3 deletions(-)

diff --git a/src/soc/rockchip/rk3399/include/soc/grf.h b/src/soc/rockchip/rk3399/include/soc/grf.h
index c0d6900..d76b827 100644
--- a/src/soc/rockchip/rk3399/include/soc/grf.h
+++ b/src/soc/rockchip/rk3399/include/soc/grf.h
@@ -128,7 +128,10 @@ struct rk3399_grf_regs {
 		u32 iomux_spi5;
 	};
 	u32 gpio2d_iomux;
-	u32 gpio3a_iomux;
+	union {
+		u32 gpio3a_iomux;
+		u32 iomux_spi0;
+	};
 	u32 gpio3b_iomux;
 	u32 gpio3c_iomux;
 	union {
@@ -341,11 +344,13 @@ static struct rk3399_pmusgrf_regs * const rk3399_pmusgrf = (void *)PMUSGRF_BASE;
 #define IOMUX_UART2A	RK_CLRSETBITS(3 << 2 | 3 << 0, 2 << 2 | 2 << 0)
 #define IOMUX_UART2B	RK_CLRSETBITS(3 << 2 | 3 << 0, 2 << 2 | 2 << 0)
 #define IOMUX_UART2C	RK_CLRSETBITS(3 << 8 | 3 << 6, 1 << 8 | 1 << 6)
-#define IOMUX_SPI2	RK_CLRSETBITS(0xff << 2, 1 << 8 | 1 << 6 |\
-				      1 << 4 | 1 << 2)
+#define IOMUX_SPI0	RK_CLRSETBITS(0xff << 8, \
+				      2 << 14 | 2 << 12 | 2 << 10 | 2 << 8)
 #define IOMUX_SPI1_RX	RK_CLRSETBITS(3 << 14, 2 << 14)
 #define IOMUX_SPI1_CSCLKTX	RK_CLRSETBITS(0x3f << 0, 2 << 4 |\
 					      2 << 2 | 2 << 0)
+#define IOMUX_SPI2	RK_CLRSETBITS(0xff << 2, 1 << 8 | 1 << 6 |\
+				      1 << 4 | 1 << 2)
 #define IOMUX_SPI5     RK_CLRSETBITS(0xff << 8, \
 				     2 << 14 | 2 << 12 | 2 << 10 | 2 << 8)
 #define IOMUX_SDMMC	RK_CLRSETBITS(0xfff, 1 << 10 | 1 << 8 | 1 << 6 |\