[coreboot-gerrit] New patch to review for coreboot: google/reef/variants/pyro: Add support for GPIO output polarity

Martin Roth (martinroth@google.com) gerrit at coreboot.org
Fri Oct 7 18:48:47 CEST 2016


Martin Roth (martinroth at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16930

-gerrit

commit 6386db70eeef3908c096373c816631d70bd13667
Author: Martin Roth <martinroth at google.com>
Date:   Fri Oct 7 10:48:31 2016 -0600

    google/reef/variants/pyro: Add support for GPIO output polarity
    
    commit 028200f7 - x86/acpi_device: Add support for GPIO output polarity
    updated ACPI_GPIO_OUTPUT to ACPI_GPIO_OUTPUT_ACTIVE_HIGH for the other
    boards that needed it, but pyro wasn't in the tree when it was initially
    pushed.  Now that pyro is in the tree, it needs to be updated as well.
    
    Change-Id: I617999b06ee584e0543d7ae3232bb2be2ff7429c
    Signed-off-by: Martin Roth <martinroth at google.com>
---
 src/mainboard/google/reef/variants/pyro/devicetree.cb | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb
index 087f858..43ec2ed 100644
--- a/src/mainboard/google/reef/variants/pyro/devicetree.cb
+++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb
@@ -84,7 +84,7 @@ chip soc/intel/apollolake
 		device pci 0d.3 on  end	# - Shared SRAM
 		device pci 0e.0 on	# - Audio
 			chip drivers/generic/max98357a
-				register "sdmode_gpio" =  "ACPI_GPIO_OUTPUT(GPIO_76)"
+				register "sdmode_gpio" =  "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)"
 				device generic 0 on end
 			end
 		end



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