[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/skylake: Enable HECI BAR for ME communication

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 29f8708fca820797a088c7e81eb830fc61b21d28
Author: Subrata Banik <subrata.banik at intel.com>
Date:   Thu Oct 13 18:05:04 2016 +0530

    soc/intel/skylake: Enable HECI BAR for ME communication
    
    This patch programs and enables BAR for ME (bus:0/
    device:0x16/function:0) device to have early ME communication.
    
    BUG=none
    BRANCH=none
    TEST=Verified Global Reset MEI message can able to perform platform
    global reset during romstage.
    
    Change-Id: I99ce0ccd42610112a361a48ba31168c9feaa0332
    Signed-off-by: Subrata Banik <subrata.banik at intel.com>
    Reviewed-on: https://review.coreboot.org/17016
    Tested-by: build bot (Jenkins)
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>


See https://review.coreboot.org/17016 for details.

-gerrit