[coreboot-gerrit] New patch to review for coreboot: northbridge/amd: Modify 00670F00 chip.h to match DCT
Marc Jones (marc@marcjonesconsulting.com)
gerrit at coreboot.org
Wed Oct 26 05:14:35 CEST 2016
Marc Jones (marc at marcjonesconsulting.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17145
-gerrit
commit e57c8829a4b2b0d60164ba33e493b00e6651b7f0
Author: Marshall Dawson <marshalldawson3rd at gmail.com>
Date: Sat Oct 8 09:12:27 2016 -0600
northbridge/amd: Modify 00670F00 chip.h to match DCT
The Stoney device supports only a single channel of DRAM with
two DIMMs. Correct the dimmensions of the SPD lookup array.
Original-Signed-off-by: Marshall Dawson <marshalldawson3rd at gmail.com>
Original-Reviewed-by: <marcj303 at gmail.com>
(cherry picked from commit 54a5e4a7092b77cca90894e86387f719fa3aa2c8)
Change-Id: Ib776133e411d483bb5b7e3c070199befc631d209
Signed-off-by: Marc Jones <marcj303 at gmail.com>
---
src/northbridge/amd/pi/00670F00/chip.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/northbridge/amd/pi/00670F00/chip.h b/src/northbridge/amd/pi/00670F00/chip.h
index 917bc65..a6cc893 100644
--- a/src/northbridge/amd/pi/00670F00/chip.h
+++ b/src/northbridge/amd/pi/00670F00/chip.h
@@ -18,7 +18,7 @@
struct northbridge_amd_pi_00670F00_config
{
- u8 spdAddrLookup[2][2][4];
+ u8 spdAddrLookup[1][1][2];
};
#endif
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