[coreboot-gerrit] Patch merged into coreboot/master: riscv: add the lowrisc/nexys4ddr mainboard
gerrit at coreboot.org
gerrit at coreboot.org
Fri Oct 28 21:09:10 CEST 2016
the following patch was just integrated into master:
commit 66bea528cfde9dea3d84ca571b7cca94964850c4
Author: Ronald G. Minnich <rminnich at gmail.com>
Date: Tue Oct 25 19:11:07 2016 -0700
riscv: add the lowrisc/nexys4ddr mainboard
This was tested at the coreboot meeting in Berlin.
The uart programming may still not be right but when used with
the lowrisc bitstream for the board we were able to load
and start linux, although it does not yet get far due to
PTE version issues with lowrisc.
Change-Id: Ia1de1a92762631c9d7bb3d41b04f95296144caa3
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Reviewed-on: https://review.coreboot.org/17132
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Tested-by: build bot (Jenkins)
See https://review.coreboot.org/17132 for details.
-gerrit
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