[coreboot-gerrit] New patch to review for coreboot: northbridge/via/cn700: transition away from device_t

Antonello Dettori (dev@dettori.io) gerrit at coreboot.org
Wed Sep 21 22:20:49 CEST 2016


Antonello Dettori (dev at dettori.io) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16689

-gerrit

commit a52299f8573c0ef4f344132cf8fbcc50b2e3edbb
Author: Antonello Dettori <dev at dettori.io>
Date:   Sat Sep 3 10:45:33 2016 +0200

    northbridge/via/cn700: transition away from device_t
    
    Replace the use of the old device_t definition inside
    northbridge/via/cn700.
    
    Change-Id: Ib7761697daad3c459f3568e5158f925199bcd919
    Signed-off-by: Antonello Dettori <dev at dettori.io>
---
 src/northbridge/via/cn700/raminit.c | 8 ++++----
 src/northbridge/via/cn700/raminit.h | 2 +-
 2 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/northbridge/via/cn700/raminit.c b/src/northbridge/via/cn700/raminit.c
index e4384ce..9cfd952 100644
--- a/src/northbridge/via/cn700/raminit.c
+++ b/src/northbridge/via/cn700/raminit.c
@@ -34,7 +34,7 @@
 #define DUMPNORTH()
 #endif
 
-static void do_ram_command(device_t dev, u8 command)
+static void do_ram_command(pci_devfn_t dev, u8 command)
 {
 	u8 reg;
 
@@ -58,7 +58,7 @@ static void do_ram_command(device_t dev, u8 command)
  *
  * @param dev The northbridge's CPU Host Interface (D0F2).
  */
-static void c7_cpu_setup(device_t dev)
+static void c7_cpu_setup(pci_devfn_t dev)
 {
 	/* Host bus interface registers (D0F2 0x50-0x67) */
 	/* Request phase control */
@@ -376,7 +376,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
 
 static void sdram_set_post(const struct mem_controller *ctrl)
 {
-	device_t dev = ctrl->d0f3;
+	pci_devfn_t dev = ctrl->d0f3;
 
 	/* Enable multipage mode. */
 	pci_write_config8(dev, 0x69, 0x03);
@@ -389,7 +389,7 @@ static void sdram_set_post(const struct mem_controller *ctrl)
 	pci_write_config16(dev, 0xa4, 0x0010);
 }
 
-static void sdram_enable(device_t dev, u8 *rank_address)
+static void sdram_enable(pci_devfn_t dev, u8 *rank_address)
 {
 	u8 i;
 
diff --git a/src/northbridge/via/cn700/raminit.h b/src/northbridge/via/cn700/raminit.h
index 7286508..80e085f 100644
--- a/src/northbridge/via/cn700/raminit.h
+++ b/src/northbridge/via/cn700/raminit.h
@@ -20,7 +20,7 @@
 #define DIMM_SOCKETS 1		/* Only one works, for now. */
 
 struct mem_controller {
-	device_t d0f0, d0f2, d0f3, d0f4, d0f7, d1f0;
+	pci_devfn_t d0f0, d0f2, d0f3, d0f4, d0f7, d1f0;
 	u8 channel0[DIMM_SOCKETS];
 };
 



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