[BULK] RE: [LinuxBIOS] FYI: AMD support for cache as ram.
Eric W. Biederman
ebiederman at lnxi.com
Fri Jun 10 07:27:26 CEST 2005
yhlu <yinghailu at gmail.com> writes:
> Some good news,
> it die at "Clearing initial memory region: ",
> I guess some code that enable mtrr or cache in raminit.c need to move
> out .c and put into crt0.S directly.
Potentially. It might simply be that we are reprogramming
top_mem or the iorrs to define what memory is and messing up the
> Another question:
> Now the auto.inc is generated with gcc, the problem there should some
> way to modify section name.
> i mean .text ---> .section .rom.text
> .section .rodat ---> .section .rom.data
> If the gcc can not do that, any one can tell me how to do that via
> perl or python....
The trivial way is to include an asm directive at the beginning.
I had actually expected to use something like the init directive
that is used on the PPC, and let gcc generate the .o files. At
that point a trivial linker script could place everything in .rom.text
and .rom.data if needed.
Anyone know why I did not receive a copy of this message on the
YH I just got a look at your auto routing hypertransport code
and while it looks to be a good step in the right direction
I had always imagined topology discovery in there. More tommorrow
after I have slept.
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