[coreboot] [PATCH]Kconfig: timers, intel cpus, tinybootblock, kontron 986lcd-m

Patrick Georgi patrick at georgi-clan.de
Mon Jan 4 19:06:07 CET 2010


Thank you for the ACKs, commited as r4996.

Here's an updated set of patches which also fixes the udelay issues the
previous set brought up (see below)

Am 03.01.2010 23:22, schrieb Stefan Reinauer:
>> 20100103-4-tinybootblock-for-intel-cpus
>> Add tinybootblock handling to Intel's CAR code:
>> - avoid the normal/fallback decision (we don't have __normal_image, and
>> we'd use CBFS for loading anyway)
>> - use CONFIG_XIP_ROM_BASE as external symbol, filled in by the linker.
>> Necessary to match the XIP region with the place where the romstage ends
>> up in (see next patch)
>>   
>>     
> +#if defined(CONFIG_TINY_BOOTBLOCK) && CONFIG_TINY_BOOTBLOCK
> +#undef CONFIG_XIP_ROM_BASE
> +        movl    $CONFIG_XIP_ROM_BASE, %eax
> +        orl     $MTRR_TYPE_WRBACK, %eax
> +#else
>          movl    $(CONFIG_XIP_ROM_BASE | MTRR_TYPE_WRBACK), %eax
> +#endif
>
> This looks very odd... I'd see why you'd do the undef, given the next
> patch, but why produce the register value at runtime?
> Since this is not a CONFIG variable in tinybootblock, maybe it would
> make sense to call it differently instead of undef'ing it?
> I.e. AUTO_CALCULATED_XIP_ROM_BASE (or something better ;)
>   
AUTO_XIP_ROM_BASE, and "orl $MTRR_TYPE_WRBACK, %eax" in all code paths.
For reference (we discussed this off list): orl (or some other hack) is
necessary because AUTO_XIP_ROM_BASE (as it is now called) is included by
the linker. The assembler has no idea how to cope with
"external-reference | constant", as far as I know.

>> 20100103-5-retarget-xip-base-for-romstage
>> - Add proper CONFIG_XIP_ROM_BASE to location.ld (used when linking the
>> romstage)
>>   
>>     
> I guess this is needed for the patch above?
>   
Yes, I merged those two patches for clarity (20100104-3):

20100104-1-fix-udelay-on-kconfig
We used to use TSC for udelay on all boards. Now there wasn't a default
in case the configuration didn't say anything about timers, which
failed. The behaviour matches newconfig's now, using UDELAY_IO in case
nothing else is selected

20100104-2-use-TSC-on-via-c7
via c7 knows TSC, so use that.

20100104-3-tinybootblock-and-proper-xip-base-on-intel-cpus
Tinybootblock support for intel CPUs, and an updated mechanism to set
the XIP area to the right location (otherwise the characters on serial
can be counted by sight)

20100104-4-kontron-with-tinybootblock-and-options-cleanup
Activate tinybootblock for the kontron/986lcd-m board, and clean up the
options: MOVNTI is activated per-cpu, HAVE_ACPI_SLIC is not a kconfig
variable.

20100104-4 is the kontron stuff from yesterday's patchset, unchanged but
merged.


Signed-off-by: Patrick Georgi <patrick.georgi at coresystems.de>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: 20100104-1-fix-udelay-on-kconfig
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20100104/cfa3bf2d/attachment.ksh>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: 20100104-2-use-TSC-on-via-c7
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20100104/cfa3bf2d/attachment-0001.ksh>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: 20100104-3-tinybootblock-and-proper-xip-base-on-intel-cpus
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20100104/cfa3bf2d/attachment-0002.ksh>
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: 20100104-4-kontron-with-tinybootblock-and-options-cleanup
URL: <http://www.coreboot.org/pipermail/coreboot/attachments/20100104/cfa3bf2d/attachment-0003.ksh>


More information about the coreboot mailing list