[coreboot] [PATCH] Convert all Intel 440BX boards to Cache-as-RAM (CAR)
Idwer Vollering
vidwer at gmail.com
Wed Oct 6 23:27:59 CEST 2010
2010/10/6 Uwe Hermann <uwe at hermann-uwe.de>
> See patch.
>
Here is a fix for building on 32-bit platforms:
Index: src/northbridge/intel/i440bx/raminit.c
===================================================================
--- src/northbridge/intel/i440bx/raminit.c (revision 5917)
+++ src/northbridge/intel/i440bx/raminit.c (working copy)
@@ -657,8 +657,8 @@
}
struct dimm_size {
- unsigned long side1;
- unsigned long side2;
+ uint32_t side1;
+ uint32_t side2;
};
static struct dimm_size spd_get_dimm_size(unsigned int device)
>
> Next steps will be:
>
> - Remove .c file includes from 440BX board's romstage.c files.
>
> - Add L2 cache support from Keith Hui, and split CPU models before
> that, as needed by that patch.
>
>
> Uwe.
> --
> http://hermann-uwe.de | http://sigrok.org
> http://randomprojects.org | http://unmaintained-free-software.org
>
> --
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>
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