[coreboot] new problem with KGPE-d16

[ron minnich]

This is called "why we should print the values and not just a message like
'transfer too big'" :-)

nice catch. Hope that fixes it.

On Mon, Jan 9, 2017 at 3:57 PM Kyösti Mälkki <kyosti.malkki at gmail.com>
wrote:

> On Tue, Jan 10, 2017 at 12:13 AM, ron minnich <rminnich at gmail.com> wrote:
>
> what's weird is coreboot is unchanged, just the payload.
>
> I am wondering if anyone recognizes this
>
> IMD small region:
>   IMD ROOT    0. bfffec00 00000400
>   ROMSTAGE    1. bfffebe0 00000004
>   GDT         2. bfffe9e0 00000200
> Writing AMD DCT configuration to Flash
> CBFS: 'Master Header Locator' located CBFS at [100:ffffc0)
> CBFS: Locating 's3nv'
> CBFS: Found @ offset 2fec0 size 10000
> Manufacturer: ef
> SF: Detected W25Q128 with sector size 0x1000, total 0x1000000
> FCH SPI: Too much to write. Does your SPI chip driver use spi_crop_chunk()?
> SF: Failed to send command 06: 1
> FCH SPI: Too much to write. Does your SPI chip driver use spi_crop_chunk()?
> SF: Failed to send command 06: 1
>
> Also ... "Too much to write" ... I'll submit a CL but, folks, "Too much to
> write"? How about some numbers on this kind of message :-)
>
>
> All AMD southbridge/spi.c is affected: spi_ctrlr_xfer() fails with
> bytesout==0.
>
> -       bytesout--;
> +       if (bytesout)
> +               bytesout--;
>
> That alone might fix it, but will need to check datasheets about resetting
> fifo pointers.
>
> Kyösti
>
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