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The wiki is being retired!

Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to Contributions welcome!

Whoa! Slow down cowboy! Go review, then come back.


  • Figure out how to move bootblock and CBFS header to make room for BOOT0 header.
  • Figure out the whole MMC/blockdev/NAND shenanigance


STOP RIGHT HERE!!!! Before anything, make sure you check for any unmerged gerrit patches; however, for doing anything useful, you will need the latest development code. This code contains the MMC driver which loads the romstage and further stages.

Build prerequisites


There are not many ARM payloads that can do anything useful. One possibly useful payload is sunxi/u***t. Here, we are interested in the payload part, not hwinit part (SPL). Once you have succesfully built sunxi/u***t, add the resulting "u-boot" file as the coreboot payload. This is an elf file that coreboot can easily load.

NOTE: The corect file to use as the payload is "u-boot", not u-boot.bin. The "u-boot" file is the non-SPL part of uboot in elf format.


Counter to the usual way of doing things, the bootable coreboot image resides in build/BOOT0. This image needs to be placed on the SD card at an offset of 8 KiB. This is a limitation on how the CPU loads the bootblock, and there's nothing we can do about it.

# dd if=build/BOOT0 of=/path/to/sdcard/blockdev bs=1024 seek=8

This is enough to get coreboot up and running.