Board:gigabyte/ga-g41m-es2l

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This page describes how to use coreboot on the Gigabyte ga-g41m-es2l mainboard.

SeaBIOS ATA DMA

By default, SeaBIOS uses PIO mode for ATA interfaces. On the ICH7 southbridge, this is very slow. Loading a kernel + initramfs can take up to 20 seconds on this board.

When using ATA DMA mode, this bug disappears. This will have to be set explicitly in the SeaBIOS config file, and selected from coreboot's menuconfig.

From the coreboot root directory, go to payloads/external/SeaBIOS/seabios:

cd payloads/external/SeaBIOS/seabios/

Create a file called .config and add these lines to it:

CONFIG_COREBOOT=y
CONFIG_ATA_DMA=y
CONFIG_VGA_COREBOOT=y

Then, create a full .config file by running:

make menuconfig

Navigate to General Features and make sure the Build Target is set to Build for coreboot.

Navigate to Hardware support and make sure that ATA DMA is enabled [*].

Navigate to VGA ROM and make sure that VGA Hardware Type is set to coreboot linear framebuffer.

Exit menuconfig and save the changes.


It is probably easiest to move the .config file to the coreboot root directory, under a different name (e.g. .seabiosconfig), as coreboot already has its own .config file.

mv .config ../../../../.seabiosconfig

Finally return to the coreboot root directory:

cd ../../../../

coreboot configuration

Create a file called .config and add at least these lines to it:

CONFIG_VENDOR_GIGABYTE=y
CONFIG_BOARD_GIGABYTE_GA_G41M_ES2L=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
CONFIG_USE_OPTION_TABLE=y

In case you do not want CPU microcode updates included in your ROM, add this line:

CONFIG_CPU_MICROCODE_CBFS_NONE=y

In case you do want to include CPU microcode updates in your ROM, add these lines:

CONFIG_USE_BLOBS=y
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y

By default, serial debugging output is enabled. It is very useful for debugging, but also slows down the boot process a lot. If you don't need serial debug or have no idea how to use it, disable it:

CONFIG_CONSOLE_SERIAL=n

Then, create a full .config file by running:

make menuconfig

Navigate to General setup and make sure that Use CMOS for configuration values is enabled [*].

Navigate to Mainboard and make sure the Mainboard vendor is set to GIGABYTE and the Mainboard model to GA-G41M-ES2L.

Navigate to Chipset and make sure that Include CPU microcode in CBFS is set to either Generate from tree or Do not include microcode updates.

  • In case you selected Generate from tree, make sure that General setup -> Allow use of binary-only repository is enabled [*].

Navigate to Devices and make sure that Use native graphics initialization is enabled [*].

Navigate to Generic Drivers and set your ethernet MAC address in Realtek rt8168 mac address.

  • You can retrieve your MAC address either from your OS when running the vendor BIOS (with ifconfig -a for instance), or from the white label on the ethernet port.

Navigate to Payload and set your SeaBIOS configuration in SeaBIOS config file.

  • This requires a full path. For instance, if your coreboot root directory is in ~/Downloads, set ~/Downloads/coreboot/.seabiosconfig

Exit menuconfig and save the changes.


Now build your ROM:

make

CMOS default values

By default, the VGA shared RAM on this board is set to 64MB, and the power on after fail option is enabled. While this is fine for server use, this is not ideal for desktop or HTPC use.

In order to change CMOS defaults, you will need nvramtool:

cd util/nvramtool/
make
mv nvramtool ../../nvramtool
cd ../../

Power on after fail can be disabled by running:

./nvramtool -C build/coreboot.rom -w power_on_after_fail=Disable

The VGA shared RAM can be increased to 128MB, 256MB or 352MB by running:

./nvramtool -C build/coreboot.rom -w gfx_uma_size=128M

or

./nvramtool -C build/coreboot.rom -w gfx_uma_size=256M

or

./nvramtool -C build/coreboot.rom -w gfx_uma_size=352M

Backing up the vendor BIOS

This board can be flashed from the vendor BIOS with flashrom, which is in the repositories of nearly every GNU/Linux distribution.

It has two chips, which is supported by flashrom's dualbiosindex option. It is recommended to use at least flashrom 0.9.7 because support for this feature is buggy in older releases.

To make a backup of the main BIOS chip, run:

sudo flashrom -p internal:dualbiosindex=0 -r m_bios.rom

To make a backup of the backup BIOS chip, run:

sudo flashrom -p internal:dualbiosindex=1 -r b_bios.rom

Internal flashing

As coreboot does not support Gigabyte's DualBIOS feature, only the M_BIOS chip has to be flashed. The B_BIOS chip can safely be erased.

To erase the backup BIOS chip, run:

sudo flashrom -p internal:dualbiosindex=1 -E

To flash the main BIOS chip, run:

sudo flashrom -p internal:dualbiosindex=0 -w build/coreboot.rom

External flashing

This board is rather hard to flash, because powering the Vcc pin on the flash chip also powers the southbridge, causing a voltage drop likely resulting in errors reading, writing and verifying the chip.

It has been found that this can be worked around by powering up the board normally (even if it doesn't boot) and then shutting it down by holding the power button for 5 seconds (or by shorting the according pins). Then connect your SPI flasher (Vcc too!) and proceed as usual.

As stated above: only M_BIOS has to be flashed. B_BIOS can simply be erased. (Or flashed as well, but that won't make a difference.)

Chip pinout

      B_BIOS                     M_BIOS
 _______________
-cs   o      vcc-           -vcc---clk-mosi-
-miso           -           |              |
-            clk-           |              |
-gnd        mosi-           |  o           |
 _______________            -cs--miso---gnd-


Status (as of commit 5360c7ef94)

Device/functionality Status Comments
CPU
CPU works OK Core 2 Duo/Quad up to 1333MHz FSB. Modded LGA771 Xeons included. Pentium 4/D won't boot.
L1 cache enabled OK
L2 cache enabled OK
L3 cache enabled N/A
Multiple CPU support N/A
Multi-core support OK
Hardware virtualization OK
RAM
EDO N/A
SDRAM N/A
SO-DIMM N/A
DDR N/A
DDR2 OK PC2-5300 CAS 5, PC2-6400 CAS 6 and PC2-6400 CAS 5 tested.
DDR3 N/A
Dual channel support OK
ECC support N/A
On-board Hardware
On-board IDE 3.5" OK
On-board IDE 2.5" Untested
On-board SATA OK
On-board SCSI N/A
On-board USB OK
On-board VGA OK
On-board Ethernet OK Requires file in CBFS to keep the proper MAC address.
On-board Audio OK
On-board Modem N/A
On-board FireWire N/A
On-board Smartcard reader N/A
On-board CompactFlash N/A
On-board PCMCIA N/A
On-board Wifi N/A
On-board Bluetooth N/A
On-board SD card reader N/A
Add-on slots/cards
ISA add-on cards N/A
Audio/Modem-Riser (AMR/CNR) cards N/A
PCI add-on cards OK
Mini-PCI add-on cards N/A
Mini-PCI-Express add-on cards Unknown
PCI-X add-on cards N/A
AGP graphics cards N/A
PCI Express x1 add-on cards Untested
PCI Express x2 add-on cards N/A
PCI Express x4 add-on cards N/A
PCI Express x8 add-on cards N/A
PCI Express x16 add-on cards OK SDVO/ADD2 cards also work fine.
PCI Express x32 add-on cards N/A
HTX add-on cards N/A
Legacy / Super I/O
Floppy Untested
Serial port 1 (COM1) OK
Serial port 2 (COM2) N/A
Parallel port Untested
PS/2 keyboard OK
PS/2 mouse Untested
Game port N/A
Infrared N/A
PC speaker OK
DiskOnChip N/A
Input
Trackpoint N/A
Touchpad N/A
Fn Hotkeys N/A
Fingerprint Reader N/A
Laptop
Docking VGA N/A
Docking LAN N/A
Docking USB N/A
Docking Audio N/A
Docking Displayport N/A
Thinklight N/A
Webcam N/A
Miscellaneous
Sensors / fan control OK Fan speed seems fixed. In practice, this is not a problem.
Hardware watchdog Unknown
SMBus OK
CAN bus N/A
CPU frequency scaling OK
Other powersaving features N/A
ACPI OK
Reboot OK
Poweroff OK
Suspend OK
Nonstandard LEDs OK
High precision event timers (HPET) OK
Random number generator (RNG) N/A
Wake on modem ring N/A
Wake on LAN OK
Wake on keyboard Unknown
Wake on mouse Unknown
TPM Unknown
Flashrom OK Can be flashed from vendor BIOS, with -p internal:dualbiosindex=0/1. Chip 1 can safely be erased with -E.