User contributions for Jn
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- 02:37, 27 April 2018 diff hist −46 Welcome to coreboot Change gerrit guidelines link to the HTML version on doc.coreboot.org
- 19:04, 22 December 2016 diff hist +5 Board:lowrisc/nexys4ddr current
- 18:46, 22 December 2016 diff hist +69 Board:lowrisc/nexys4ddr
- 18:42, 22 December 2016 diff hist +505 Board:lowrisc/nexys4ddr
- 18:35, 22 December 2016 diff hist +103 Board:lowrisc/nexys4ddr
- 20:38, 20 December 2016 diff hist +170 N Board:apple/macbookair4 2 Rudimentary information current
- 01:33, 25 November 2016 diff hist −2,672 Board:emulation/spike-riscv Replace the boot log with a newer one. current
- 00:28, 25 November 2016 diff hist −914 Board:emulation/spike-riscv update build instrcutions a little
- 14:40, 29 October 2016 diff hist +568 Board:lowrisc/nexys4ddr instructions
- 14:29, 29 October 2016 diff hist 0 N Board:lowrisc/nexys4ddr create page
- 15:54, 7 October 2016 diff hist +130 EHCI Debug Port fix a broken link. archive.org FTW!
- 09:05, 4 October 2016 diff hist +86 DIY EHCI debug dongle →Firmware current
- 02:43, 4 October 2016 diff hist +74 DIY EHCI debug dongle →Firmware: another git repo link
- 19:04, 22 August 2016 diff hist +15 Board:emulation/spike-riscv →Building the toolchain
- 18:59, 22 August 2016 diff hist −85 Board:emulation/spike-riscv →Building the toolchain
- 18:06, 22 July 2016 diff hist −45 Board:emulation/spike-riscv →Build instructions
- 16:08, 22 July 2016 diff hist +333 Board:emulation/spike-riscv →Building bbl
- 01:51, 20 July 2016 diff hist −89 Board:emulation/spike-riscv →Building coreboot with bbl
- 00:54, 20 July 2016 diff hist −269 Board:emulation/spike-riscv →Building coreboot with bbl
- 22:49, 19 July 2016 diff hist −374 Board:emulation/spike-riscv →Building coreboot without a payload
- 19:43, 1 July 2016 diff hist −4 Board:emulation/spike-riscv →Building coreboot without a payload
- 19:14, 1 July 2016 diff hist −2 Board:emulation/spike-riscv →Building the toolchain
- 22:35, 30 June 2016 diff hist +89 Board:emulation/spike-riscv →Building coreboot with bbl
- 03:05, 30 June 2016 diff hist +223 Board:emulation/spike-riscv →Building coreboot with bbl
- 02:18, 30 June 2016 diff hist 0 m Board:emulation/spike-riscv →boot log
- 02:18, 30 June 2016 diff hist −257 Board:emulation/spike-riscv →boot log
- 02:15, 30 June 2016 diff hist +585 Board:emulation/spike-riscv fix boot log
- 02:10, 30 June 2016 diff hist +11,653 Board:emulation/spike-riscv →boot log
- 01:39, 30 June 2016 diff hist +45 Board:emulation/spike-riscv →Build instructions
- 01:11, 30 June 2016 diff hist +111 Board:emulation/spike-riscv →Building the toolchain
- 01:08, 30 June 2016 diff hist +352 Board:emulation/spike-riscv →Building coreboot without a payload
- 23:29, 29 June 2016 diff hist +56 Board:emulation/spike-riscv →Building coreboot with bbl
- 22:40, 29 June 2016 diff hist +2,373 Board:emulation/spike-riscv Build instructions
- 21:52, 29 June 2016 diff hist +40 User:Jn current
- 21:47, 29 June 2016 diff hist +19 User:Jn
- 21:41, 29 June 2016 diff hist +13 N Talk:Board:emulation/spike-riscv Created page with "* dummy entry" current
- 01:32, 2 June 2016 diff hist +61 User:Jn
- 11:22, 31 May 2016 diff hist +69 User:Jn
- 11:11, 31 May 2016 diff hist +522 N User:Jn Created page with "Full name: Jonathan Neuschäfer ==GSoC 2016== During this year's Google Summer of Code, I'm working on improving coreboot's support for RISC-V systems. This involves: - Get..."
- 11:05, 31 May 2016 diff hist +16 Board:emulation/spike-riscv Link to the RISCV.org spike tool page instead of spike's github repo
- 11:02, 31 May 2016 diff hist +97 N Board:emulation/spike-riscv Created page with "[https://github.com/riscv/riscv-isa-sim SPIKE] is [https://riscv.org/ RISC-V]'s primary emulator."