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- ...sure maximal test coverage, the [[AutoTest/RaptorEngineering|REACTS]] runs all tests with RS232 logging disabled. In the event that a test boot fails, th ...1 KB (174 words) - 21:19, 10 November 2015
- # look into all FL2 files, only one will worked for me ...768 bytes (125 words) - 15:26, 17 October 2014
- ...dware is present, one can '''not''' assume that it has been initialized at all. Some payload and OS might not work at all, as they depend on resolution switching or text mode. Those cannot be fixed ...3 KB (433 words) - 18:38, 24 April 2018
- Note that, on newer systems, there need be no moving parts at all. At LANL, we are building a new 'no moving parts' 16-node cluster to demons ...1 KB (174 words) - 13:12, 15 January 2008
- ...coreboot, but can also be used for non-coreboot systems (e.g. for dumping all NVRAM bytes). ...t" and if the checksum in the CMOS/NVRAM is incorrect, coreboot will write all the default value and compute a correct checksum. ...7 KB (1,059 words) - 20:48, 6 September 2015
- |PCI_cards_comments = Tested: PCI VGA card in all five PCI slots. RAM Enable 2: Precharge all ...5 KB (856 words) - 23:21, 18 January 2014
- |USB_comments = Tested: USB thumb drive, USB keyboard (in all 10 USB ports), USB webcam, USB DVB-T adapter. |PCI_cards_comments = Tested: PCI VGA card (X11 works fine) in all three PCI slots. ...4 KB (664 words) - 23:22, 18 January 2014
- * The MAC address is stored in flash for almost all CK804/MCP55 boards. All of these boards flashed with coreboot probably have the same MAC address. S ...4 KB (694 words) - 03:35, 19 January 2014
- ** Config option for enabling/disabling HPET (high precision event timers) on all boards which have them. ...1 KB (208 words) - 18:55, 26 September 2010
- ...well supported and stable under Coreboot with Family 10h processors, with all CPUs, RAM, and peripherals functioning normally. K8 processors currently r ...1 KB (206 words) - 17:01, 11 October 2016
- The hash (#) character is the comment prefix, all characters until the end of line are treated as comment. This section defined all the variables used within coreboot. Each line consists out of the following ...6 KB (538 words) - 16:41, 26 January 2011
- * all slots populated (with additional RAM) - strange UMA artefacts * all slots populated -- doesn't boot ...3 KB (552 words) - 23:20, 18 January 2014
- |PCI_cards_comments = Tested: PCI NIC in all PCI slots. ...2 KB (405 words) - 23:21, 18 January 2014
- All fields are present in each segment entry, though not every field will be va * Specified that all the segment header members are stored in little endian ...5 KB (786 words) - 14:37, 15 June 2016
- ...ices / Use native graphics initialization = enable (NOTE: not available on all systems) You can see all of the options available by running 'make help': ...10 KB (1,581 words) - 08:16, 3 May 2018
- |Floppy_comments = There is no floppy connector at all. ...3 KB (424 words) - 10:38, 28 March 2015
- ...board fails verification the test stand will set Verified-1, otherwise if all boards pass verification it will set Verified+1. All tests are run in parallel. Coreboot serial output is disabled by default s ...4 KB (575 words) - 20:42, 13 January 2017
- ...gi/web/usb_dongle_fpga/overview free software and full schematics] (scroll all the way to the bottom for download links, or click on the CVS: browse link ...ram). They also provide the binary image for the v5 of the VHDL. Of course all sources are available to build that binary image, but currently proprietary ...8 KB (1,391 words) - 06:11, 14 April 2015
- All output from these tools are on [[ASUS P4C800-E Deluxe Build Tutorial/Infos] ...2 KB (254 words) - 19:49, 5 October 2008
- ...ery once in a while resume fails, requiring removal of the RTC battery and all power sources to recover ...3 KB (448 words) - 13:41, 31 December 2017